Recently, there are widely known semiconductor memory devices such as flash memory that stores information depending on a held charge amount. A multi-value memory technology for storing two bits or more of information by setting a plurality of thresholds of the charge amount is also developed.
In the semiconductor memory devices, electric charge is discharged with passage of time, and thus, if the charge is discharged more than the threshold, an error may occur when information is read. Particularly, a multi-value type of memory device has generally narrow intervals between thresholds, and this causes the probability of occurrence of an error to increase.
Japanese Patent Application Laid-Open No. 2007-87464 discloses a storage device, using the semiconductor memory device, which includes an error correction mechanism to correctly recover incorrect information.
There is a case in which many errors may be included in data consisting of a plurality of bits caused by the passage of time since the last recording of the data, and even in this case, a correction mechanism having a high error correction capability is generally required to correct the errors. The correction mechanism having the high error correction capability requires a large circuit scale, a large power consumption, and a long time for processing. Generally, the correction mechanism having the high error correction capability is provided to ensure recovery of incorrect information to correct one even after a long time has passed since the last storage of the information. The high-performance error correction mechanism is uniformly applicable to storage devices irrespective of a length of the passage of time since the last storage of the information.
Consequently, even when information is to be read after the passage of only a short period of time since the storage thereof, the high-performance error correction mechanism is used. Therefore, the high-performance error correction mechanism is wastefully used even if the information to be read contains not so many errors. This leads to wasteful consumption of power for the storage device.
Besides, to increase the error correction capability, it is generally required to increase information as an object of error correction. An error correction code is generated using, for example, 4-kilobyte data in which a plurality of 512-byte data is connected to each other as a unit, instead of generation of an error correction code for, for example, 512-byte data. This technique enables the error correction capability to be increased. This technique, however, results in reading of 4-kilobyte data, although 512-byte data is wished to be read. This also forces the storage device to wastefully consume electric power.
It is an object of the present invention to provide a semiconductor storage device, a method of controlling the same, and an error correction system capable of reducing a power consumption and a circuit scale without detriment to the error correction capability.